ASEE 2005 Annual Conference
10.1229.1 - 10.1229.9
VHDL has become an industrial standard language in digital system design. This paper introduces the author’s experience in teaching sequential logic VHDL models to students through synthesis and examples from simple to complex design problems. The simple sequential circuits such as latches, FFs (flip-flops) are first introduced with all the control signals, then the same design concepts and procedures are extended to sequential logic blocks such as counters and shift registers. These design approaches are also applicable in complex sequential digital system designs. The author’s experiences showed the effectiveness of this approach in teaching sequential logic VHDL models.
Engineering course, VHDL, digital systems, sequential circuit
Guoping Wang Dr. (2005).
Teaching Sequential Logic Circuit VHDL Models by Synthesis and Examples. 10.1229.1 - 10.1229.9.Presented at ASEE 2005 Annual Conference, Portland, Oregon.