Document Type

Presentation

Presentation Date

6-2005

Conference Name

ASEE 2005 Annual Conference

Conference Location

Portland, Oregon

Publication Date

6-12-2005

Inclusive pages

10.1229.1 - 10.1229.9

Abstract

VHDL has become an industrial standard language in digital system design. This paper introduces the author’s experience in teaching sequential logic VHDL models to students through synthesis and examples from simple to complex design problems. The simple sequential circuits such as latches, FFs (flip-flops) are first introduced with all the control signals, then the same design concepts and procedures are extended to sequential logic blocks such as counters and shift registers. These design approaches are also applicable in complex sequential digital system designs. The author’s experiences showed the effectiveness of this approach in teaching sequential logic VHDL models.

Keywords

Engineering course, VHDL, digital systems, sequential circuit

Disciplines

Engineering

Included in

Engineering Commons

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Link to Original Published Item

https://peer.asee.org/14230