Document Type

Presentation

Presentation Date

6-2005

Conference Name

ASEE 2005 Annual Conference

Conference Location

Portland, Oregon

Publication Date

6-12-2005

Inclusive pages

10.1200.1 - 10.1200.8

Abstract

Digital Logic System Design is a very important course in electrical and computer engineering programs. Current teaching methods propose the integration of Hardware Description Language (Verilog or VHDL). This paper describes the author’s experience in integrating Xilinx ISE tools and FPGA/CPLD logic devices into the teaching of digital logic system in a teaching-oriented university. The author’s experience indicates that integrating CAD and FPGA/CPLD instead of the early introduction of HDL can better facilitate the learning of digital system design.

Keywords

Engineering courses, logic design, digital system design, VHDL

Disciplines

Engineering

Included in

Engineering Commons

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Link to Original Published Item

https://peer.asee.org/14224