ASEE 2005 Annual Conference
10.1200.1 - 10.1200.8
Digital Logic System Design is a very important course in electrical and computer engineering programs. Current teaching methods propose the integration of Hardware Description Language (Verilog or VHDL). This paper describes the author’s experience in integrating Xilinx ISE tools and FPGA/CPLD logic devices into the teaching of digital logic system in a teaching-oriented university. The author’s experience indicates that integrating CAD and FPGA/CPLD instead of the early introduction of HDL can better facilitate the learning of digital system design.
Engineering courses, logic design, digital system design, VHDL
Guoping Wang Dr. (2005).
Teaching Digital Logic Design Using CAD Tools in a Teaching-Oriented University. 10.1200.1 - 10.1200.8.Presented at ASEE 2005 Annual Conference, Portland, Oregon.